8V79S683NLGI

8V79S683NLGI is a JESD204B/C compliant fanout buffer and divider. This 3 is a fully integrated, clock and SYSREF signal fanout buffer for JESD204B/C applications. It is designed as a high-performance clock and converter synchronization solution for wireless base station radio equipment boards with JESD204B/C subclass 0, 1, and 2 compliance. The main function of the device is the distribution and fanout of high-frequency clocks and low-frequency system reference signals generated by a JESB204B clock generator such as the IDT 8V19N490, extending its fanout capabilities and providing additional phase-delay. This is optimized to deliver very low phase noise clocks and precise, phase-adjustable SYSREF synchronization signals. Typical application includes wireless infrastructure applications: 4G, 5G, and mmWave, frequency divider synchronization across multiple devices, ideal clock driver for jitter-sensitive ADC and DAC circuits, radar, imaging, instrumentation and medical.

• Distribution, fanout, phase-delay of clock and SYSREF signals
• Very low output noise floor: -158.8dBc/Hz noise floor (245.76MHz)
• Four output channels with a total of 16 differential outputs
• Each channel contains frequency dividers and clock phase delay circuits
• Phase alignment mode across multiple buffers with any frequency divider setting
• Flexible differential outputs (LVDS/LVPECL/amplitude configurable)
• Configuration through 3-wire SPI interface
• Core supply voltage range from 3.135 to 3.465V (VDD-V = 3.3V ± 5%, TA = -40°C to +105°C)
• 820mA typical power supply current (VDD-V = 3.3V ± 5%, TA = -40°C to +105°C)
• 64 pin VFQFPN package, operating temperature range from -40°C to +85°C